Second level inser

ASIC: Digital Design

We offer two approaches for the ASIC implementation solutions:

1. Functional Specification through RTL to GDSII
2. RTL to GDSII

Technical Expertise

  • Multi-million gate designs
  • Successful tape-outs with production parts
  • Operational functional frequency up to 225 MHZ
  • Interface functional speeds up to 2.5 GHZ
  • Pin counts in excess of 700
  • Microprocessors
  • Network Processors
  • Digital Signal Processors
  • Telecommunications devices
  • High speed SONET and Ethernet interfaces

End-to-end ASIC Design and Implementation Portfolio

Design Generation
  • Verilog
  • VHDL
  • SystemVerilog
  • Matlab® Model Based Designs
Functional Verification
  • Test plan creation
  • Functional test development
  • Mixed language simulations – Verilog + VHDL + C
  • Support for RTL and gate level simulations
  • Code coverage analysis
Netlist generation
  • Synthesis constraint script and environment setup
  • Top-down or bottom-up approach
  • Physical synthesis as needed
Static Timing Analysis
  • Hierarchical vs. flat STA
  • On-core timing analysis
  • IO characterization
Formal Verification
  • RTL to Pre-layout gates
  • RTL to post-layout gates
  • Pre-layout gates to post-layout gates
DFT
  • Scan insertion
  • MBIST insertion
  • ATPG test vector generation
Physical Design
  • Floorplanning using JupiterXT
  • Prototyping using First Encounter, IC-Wizard, FloorPlan Compiler
  • Automatic Place and Route
  • LVS, DRC physical design verification
  • GDSII creation
State of the art CAE tool suites and methodologies from Synopsys®, Cadence®, Mentor Graphics®, etc.

Signal Processing application development and analysis with MATLAB® and Simulink® Tools.

Target Technologies: TSMC, UMC, IBM and other Government and Commercial Fabrication Process based on customer specifications.

We provide comprehensive flow once the Functional or Architectural Specification is delivered to us. We begin working with the design team as early as architectural definition is ready, so that we can begin working towards the backend processes in parallel with RTL code generation. We take extreme steps in terms of scheduling and efficient flows to help our customer in meeting the tape-out date.

When you partner with Syneren Technologies, you are assigned a highly skilled set of engineers whose goal is to make your product a success. Our engineers have high quality standards and will work very closely with you in ensuring that you get exactly what you intended.
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